cha1008 - 99f ref. : dscha10082128 - 07 may 12 1 / 8 specifications subject to change without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 80 - 105ghz balanced low noise amplifier gaas monolithic microwave ic description the cha1008 - 99f is a broadband, balanced , four - stage monolithic low noise amplifier . it is designed for millimeter - wave imaging applications and can be use in commercial digital radios and wireless lans . the circuit is manufactured on a phemt process, 0. 10 m gate length, via holes through the substrate, air bridges and electron beam ga te lithography. it is available in chip form . main features main electrical characteristics tamb. = + 25c symbol parameter min typ max unit freq frequency range 80 105 ghz gain linear gain (from 80 to 90ghz) 16 db nf noise figure (from 80 to 90ghz) 5 db pout output power @1db comp. 5 dbm in out 0 2 4 6 8 10 12 14 16 18 20 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 gain & nf (db) frequency (ghz) gain and noise figure gain nf
cha1008 - 99f 80 - 105ghz balanced low noise amplifier ref. : dscha10082128 - 07 may 12 2 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 electrical characteristics tamb.= +25c , vd = 2.5 v symbol parameter min typ max unit freq frequency range 80 105 ghz gain linear gain 17 db nf noise figure [80 - 90]ghz [90 - 100]ghz [100 - 105]ghz 5.0 6.5 7.5 db rllin input return loss - 1 4 db rlout output return loss - 1 2 db in/out impedance input & output impedance in the chip plan 50 ohms op1db output power @1db compression 5 dbm v g1, vg2 gate voltage s (either on vg1 or vg2 or both on vg1 & vg2) +0. 15 v vd drain voltage 2.5 v i d drain current 115 ma these values are representative of on - wafer measurements that are made without bonding wires at the rf ports. absolute maximum ratings (1) tamb.= +25c symbol parameter values unit v d drain bias voltage 3 v i d drain bias current 15 0 ma vg1, vg2 gate bias voltage - 2 to + 0.8 v pin maximum peak input power overdrive (2) 0 dbm tj junction temperature 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +150 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s. typical bias conditions tamb.= + 25c symbol parameter values unit v d dc drain voltage 2.5 v id d rain current controlled with vg1 or vg2 115 ma vg1, vg2 dc gate voltages linked together into the circuit (only one can be used) + 0.15 v
80 - 1 05ghz balanced low noise amplifier cha1008 - 99f ref. : dscha10082128 - 07 may 12 3 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical on - wafer sij parameters tamb.= +25c, v d = 2.5 v, i d = 115 ma freq (ghz) s11 (db) phs11 () s12 (db) phs12 () s21 (db) phs21 () s22 (db) phs22 () 70 - 9.62 - 27.4 - 46.61 - 1.7 - 14.84 - 77.4 - 19.06 - 147.5 71 - 7.90 - 59.9 - 45.20 - 29.0 - 12.29 - 97.7 - 23.78 - 147.3 72 - 6.07 - 92.8 - 40.60 - 79.9 - 9.91 - 112.3 - 15.39 - 132.2 73 - 4.55 - 129.0 - 39.39 - 141.1 - 6.20 - 126.5 - 15.31 - 151.5 74 - 2.99 - 177.8 - 38.67 - 178.6 - 1.39 - 145.8 - 16.08 174.2 75 - 3.70 112.1 - 37.80 122.6 3.76 - 175.9 - 21.34 156.5 76 - 7.04 27.1 - 39.02 57.8 8.27 147.2 - 32.33 - 88.8 77 - 9.89 - 54.8 - 49.41 11.4 12.45 106.5 - 25.50 - 87.4 78 - 11.11 - 119.6 - 50.15 8.0 16.25 55.7 - 15.98 - 91.1 79 - 15.87 - 165.0 - 47.11 - 33.3 17.72 - 1.7 - 14.77 - 113.8 80 - 24.20 173.2 - 60.94 - 113.5 17.16 - 50.1 - 12.28 - 136.7 81 - 28.72 - 99.1 - 51.00 - 67.4 16.38 - 88.2 - 12.32 - 152.4 82 - 21.77 - 98.6 - 48.05 - 109.3 16.01 - 121.7 - 13.09 - 159.2 83 - 18.19 - 113.9 - 53.75 - 119.6 16.13 - 154.9 - 11.89 - 171.9 84 - 16.98 - 118.1 - 52.54 - 161.8 16.20 174.3 - 12.21 171.4 85 - 15.21 - 135.4 - 51.74 146.8 16.85 141.8 - 13.98 156.7 86 - 15.61 - 154.4 - 52.07 103.4 17.06 107.0 - 15.12 152.8 87 - 16.28 - 162.2 - 55.59 - 10.9 16.60 73.6 - 15.11 154.1 88 - 16.82 - 172.6 - 63.41 - 173.6 16.54 44.6 - 15.99 144.6 89 - 17.77 174.3 - 59.12 100.7 16.46 14.0 - 16.01 138.5 90 - 20.16 162.6 - 56.99 37.3 16.26 - 16.5 - 15.98 127.1 91 - 23.37 160.8 - 58.98 - 48.2 16.21 - 45.1 - 17.49 117.1 92 - 25.07 174.8 - 63.88 42.0 16.53 - 73.5 - 18.31 108.2 93 - 27.83 - 176.8 - 49.55 15.8 16.66 - 103.9 - 18.51 99.7 94 - 24.20 - 142.3 - 45.20 - 14.8 16.88 - 132.6 - 23.35 82.7 95 - 19.58 - 159.9 - 44.79 - 51.8 17.43 - 163.4 - 27.83 119.0 96 - 19.07 169.2 - 47.08 - 78.6 17.66 160.9 - 20.18 121.6 97 - 20.34 148.5 - 47.05 - 86.8 17.19 127.5 - 20.52 105.7 98 - 21.08 132.2 - 46.64 - 96.8 16.74 97.5 - 20.30 83.3 99 - 20.56 115.6 - 46.80 - 89.2 16.54 69.0 - 21.28 67.8 100 - 19.37 85.3 - 43.63 - 90.3 17.19 41.0 - 28.63 - 10.1 101 - 18.31 52.3 - 41.25 - 106.8 17.51 4.7 - 28.04 164.1 102 - 16.68 28.0 - 40.83 - 125.1 17.32 - 29.6 - 21.86 121.9 103 - 14.47 1.7 - 43.05 - 142.1 17.12 - 62.6 - 22.99 113.3 104 - 13.45 - 28.5 - 41.39 - 138.6 17.38 - 94.2 - 22.85 74.3 105 - 13.48 - 46.5 - 40.08 - 150.1 17.99 - 129.8 - 30.09 105.1 106 - 12.52 - 54.9 - 40.47 - 165.1 18.53 - 169.5 - 28.68 173.0 107 - 11.21 - 72.6 - 41.80 - 163.4 19.12 146.3 - 20.32 169.1 108 - 11.12 - 84.1 - 39.92 175.3 19.28 91.4 - 12.90 138.1 109 - 9.82 - 90.7 - 36.78 173.2 16.28 29.9 - 10.74 106.6 110 - 8.67 - 109.5 - 36.82 159.6 12.41 - 8.0 - 10.66 76.0
cha1008 - 99f 80 - 105ghz balanced low noise amplifier ref. : dscha10082128 - 07 may 12 4 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical on wafer measurements tamb.= +25c , vd = 2.5v, id = 115ma linear gain versus frequency noise figure versus frequency 0 2 4 6 8 10 12 14 16 18 20 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 gain (db) frequency (ghz) 2 3 4 5 6 7 8 9 10 11 12 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 noise figure (db) frequency (ghz)
80 - 1 05ghz balanced low noise amplifier cha1008 - 99f ref. : dscha10082128 - 07 may 12 5 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical on wafer measurements tamb .= +25c , vd = 2.5v, id = 115ma input return loss versus frequency output return loss versus frequency - 35 - 30 - 25 - 20 - 15 - 10 - 5 0 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 input return loss (db) frequency (ghz) - 35 - 30 - 25 - 20 - 15 - 10 - 5 0 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 output return loss (db) frequency (ghz)
cha1008 - 99f 80 - 105ghz balanced low noise amplifier ref. : dscha10082128 - 07 may 12 6 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 mechanical data chip thickness: 70m dc pad size: 190x80m rf pad size: 122x72m . chip size: 3400x1600 35m all dimensions are in micrometers
80 - 1 05ghz balanced low noise amplifier cha1008 - 99f ref. : dscha10082128 - 07 may 12 7 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 dc schematic notes vd supply voltage is common for the 4 stage s of the amplifier. vg1 and vg2 pads are linked in the circuit so the gate supply voltage can be apply either on vg1 or vg2. vg1 vg2 vd in out
cha1008 - 99f 80 - 105ghz balanced low noise amplifier ref. : dscha10082128 - 07 may 12 8 / 8 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums products. recommended environmental management ums products are compliant with the regulation in particular with the directives rohs n2011/65 and reach n1907/2006. more environmental data are available in the application note an0019 also available at http://www.u ms - gaas.com . ordering information chip form : cha1008 - 99f /00 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in thi s publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.
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